Manufacturing Challenges of High-k Materials – an Industry Perspective (Video)

In the early days of the search to find a replacement for SiO2-based gate oxides the goal was to find a material with a very high k value which could be incorporated into CMOS production for multiple technology nodes. A retrospective of the many promising high k materials considered for SiO2 replacement, leading to the selection of Atomic Layer Deposition of Hafnium Oxide (ALD HfO2) as “the winner” will be presented. ALD HfO2 has successfully been implemented in CMOS production for 15 years, starting at the 45nm node. There are two general integration approaches for implementing ALD High-k/Metal Gate stacks (HKMG) in production: gate first and gate last. Manufacturing challenges with each integration approach, leading to the wider adoption of gate last will be discussed. Furthermore, as the dielectric constant of HfO2 is only ~20 and a thin SiO2- base interface was still required to maintain mobility and reliability, HfO2 provided essentially a one-time scaling benefit. Further thinning of HfO2 resulted in unacceptable leakage and thus, to continue transistor scaling, fully depleted devices such as FINFET and Ultra-Thin Planar SOI (FDSOI) were pursued. High volume manufacturing flows for FINFET (with gate last integration) and FDSOI (with gate first integration) come with their own unique challenges. For example, with FINFET maintaining gate height uniformity is crucial for Vt targeting and control. With FDSOI, maintaining gatestack stability at high temperature is key. To continue future scaling, new device architectures (e.g. GAA, CFET.) will pose further challenges for gate stack integration. Recent and historical progress in HfO2 growth, interface control, selective deposition, morphology, and etching will be discussed about the possibility for future gate stack engineering.