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A Reliability Enhanced 5 nm CMOS Technology Featuring 5th Generation FinFET with Fully Developed EUV and High Mobility Channel for Mobile SoC and High Performance COmputing Application
15 Dec 2020

A Reliability Enhanced 5 nm CMOS Technology Featuring 5th Generation FinFET with Fully Developed EUV and High Mobility Channel for Mobile SoC and High Performance COmputing Application

  • EDS
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First Demonstration of Heterogeneous Complemntary FETs Utilizing Low Temperature (200 C) Hetero Layers Bonding Technique (LT-HBT)
15 Dec 2020

First Demonstration of Heterogeneous Complemntary FETs Utilizing Low Temperature (200 C) Hetero Layers Bonding Technique (LT-HBT)

  • EDS
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Progressing -190 C to +500 C Durable SiC JFET ICs From MSI to LSI
15 Dec 2020

Progressing -190 C to +500 C Durable SiC JFET ICs From MSI to LSI

  • EDS
    Members: $5.00
    IEEE Members: $10.00
    Non-members: $20.00